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The Improvement of Lot Delivery Time in 450 mm Semiconductor Manufacturing |
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PP: 2983-2990 |
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Author(s) |
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Chia-Nan Wang,
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Abstract |
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| Semiconductor industry has tremendous development in recent decades. According to Moore’s Law [1], semiconductor
wafer manufacturers have to search improvement opportunities constantly in order to be competitive. International technology roadmap
for semiconductor [2] has indicated the possible scenarios for 450 mm wafer fabs, and the conveyor will be a potential solution to realize
transportation automation. How to reduce the bottleneck of transportation is a valuable issue for the highly capital intensive industry.
The purpose of this paper is to focus on improving the bottleneck of conveyor loops and provide effective transport dispatching rule for
450 mm wafer fab. The results demonstrate that controlling the speed of bottleneck loops can expedite the movement of lots and reduce
lot transport time with the range from 6.24% to 13.02% without more input resources. These results are also verified by statistics. So
the proposed rule can effectively reduce product cycle time in 450 mm wafer fab under conveyor transportation environment. |
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